CMOS-Compatible Vertical-Silicon-Nanowire Gate-All-Around p-Type Tunne…
| 2011-12-26 | |
| R. Gandhi, Z. Chen, N. Singh, K. Banerjee, Sungjoo Lee | |
| IEEE Electron Device Letters | |
| 2.849 | |
관련링크
본문
Volume 32, Issue 11, p. 1504, 2011
https://ieeexplore.ieee.org/document/6029281/
https://ieeexplore.ieee.org/document/6029281/